Inheritance of declarative parts is defined by means of the following rules:
  • declarations of a parent entity are implicitly declared within a derived entity
  • an implicit declaration of a non-overloadable item is hidden by an explicit declaration using the same identifier. An implicit declaration of an overloadable item is hidden by an explicit declaration that has the same parameter and return type profile as the implicit item
  • inherited declarations are inherited to further derived entities/architectures

Hidden items can be accessed by a qualified notation: xx.yy, where xx denotes the name of the parent entity/architecture and yy denotes the name of the hidden item.

Inheritance of statement parts refers to concurrent statement:


Inherited labeled concurrent statements can be overwritten by redefining the label. It is not possible to overwrite concurrent statements of an entity in an architecture. Overwritten concurrent statements are not available anymore. Unlabeled concurrent statements can not be redefined.

The inherited concurrent statements in combination with the new or redefined statements build the effective entity statement part of the derived entity respectively the effective architecture statement part of the derived architecture.

With entity inheritance the ports and generics of the parent entity declaration will be inherited by the derived entity declaration. To ensure the functionality of inherited code, it is allowed to extend ports and generics but it is not permitted to redeclare them.

The ports and generics of a (derived) Objective VHDL entity are defined by the effective port list and effective generic list , respectively.